1. Field of the Invention
The present invention relates to the field of program analysis. More specifically, the present invention relates to data profiling.
2. Description of the Related Art
Profiling code aids developers in identifying sections of code that consume excessive amounts of execution time. Profiling provides to developers data that aids in accomplishing the task of optimizing code.
In general, two major classes of profiling techniques exist: code instrumentation and hardware assisted profiling. Code instrumentation techniques typically include the insertion of instructions into the instruction stream of a program to be profiled. In crude form, programmer insertion of printf source statements may be employed to profile code. More sophisticated approaches may employ compiler facilities or options to insert appropriate instruction or operations to support profiling. Upon execution of the instrumented code, execution characteristics are sampled, in part by operation of the added instructions. Typically, code instrumentation techniques impose overhead on original program code so instrumented and, unfortunately, the insertion of instructions into the instruction stream may itself alter the behavior of the program code being sampled.
Hardware assisted profiling techniques have been developed, in part, to address such limitations by off loading some aspects to dedicated hardware such as event counters. Practical implementations often employ aspects of code instrumentation and hardware assistance. In some cases, profiling support is included in, or patched into, exception handler code to avoid imposing overhead on each execution of a sampled instruction. Suitable hardware event counters are provided in advanced processor implementations such as those in accordance with the SPARC® and Alpha processor architectures. SPARC architecture based processors are available from Sun Microsystems, Inc, Palo Alto, Calif. SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems. Systems that include Alpha processors are available from a number of sources including Compaq Computer Corporation.
One reasonably comprehensive hardware assisted profiling environment is provided by the Digital Continuous Profiling Infrastructure (DCPI) tools that run on Alpha processor systems to provide profile information at several levels of granularity, from whole images down to individual procedures and basic blocks on down to detailed information about individual instructions, including information about dynamic behavior such as cache misses, branch mispredicts and other forms of dynamic stalls. Information on the DCPI tools appear in Jennifer Anderson, Lance Berc, George Chryos, Jeffrey Dean, Sanjay Ghemawat, Jamey Hicks, Shun-Tak Leung, Mitch Lichtenberg, Mark Vandevoorde, Carl A. Waldspurger, William E. Weihl, “Transparent, Low-Overhead Profiling on Modern Processors,” in Proceedings of the Workshop on Profile and Feedback-Directed Compilation in conjunction with the International Conference on Parallel Architectures and Compilation Techniques (PACT 98), Paris, France (Oct. 13, 1998).
While conventional profiling tools provide per image, per procedure, per source line, or per instruction level profile information, these tools do not provide profile information in relation to other aspects of code behavior. In particular, conventional profiling tools do not perform data profiling. For example, the majority of stall time is caused by memory related operations or load type instruction instances, but conventional tools do not provide information about these memory related operations from the perspective of data objects, addresses of data objects, or data object definitions. Hence, conventional profiling tools do not provide information about data objects, that typically consume the most amount of execution time. In addition, conventional tools do not correlate multiple code behavior attributes in relation to consumed execution time.